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Does anyone here know about potentially enabling AVX-512 on Intel 12gen Alder Lake (p-cores maybe not fused off?) (lemmy.world)

submitted 1 year ago by [email protected] to c/[email protected]

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This is a reference for the situation:

https://www.tomshardware.com/news/intel-nukes-alder-lake-avx-512-now-fuses-it-off-in-silicon

Basically some Alder's had the instruction available. I would like to check if my comp has the possibility. It is not in the bootloader. Maybe there is a way in KeyTool or another way? I don't know if I would need to set affinity or if the CFS has a way to detect software running with the instruction and keep it running on P cores.

I'm mainly looking to try to enable this for the largest LLMs I am running. llama.cpp is looking for this instruction and subset already.

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[–] [email protected] 1 points 1 year ago

It isn't a direct line to connect, sorry if I am bad at explaining it. The P and E cores mix are the issue. The P cores are Xeon designs that (may) have the extra instructions. The E cores do not. If simply turning off the E cores has made the P cores show up with AVX512 on some systems, I imagine it may have to do with the scheduler. I could be wrong.

The CPU scheduler will require some kind of management function that could bind the process to a core with the extra AVX instructions without manual intervention. This would need to override availability, kernel threads, and things like power efficiency or spin up optimisation. I haven't taken a super deep dive into how the scheduler is working on a 12th gen. I can say it appears to pin processes more, but I still see a regular rotation of most running processes across cores when they have no affinity or isolation settings, like when I am running a large LLM.