this post was submitted on 11 Aug 2024
41 points (97.7% liked)

Hardware

663 readers
181 users here now

All things related to technology hardware, with a focus on computing hardware.


Rules (Click to Expand):

  1. Follow the Lemmy.world Rules - https://mastodon.world/about

  2. Be kind. No bullying, harassment, racism, sexism etc. against other users.

  3. No Spam, illegal content, or NSFW content.

  4. Please stay on topic, adjacent topics (e.g. software) are fine if they are strongly relevant to technology hardware. Another example would be business news for hardware-focused companies.

  5. Please try and post original sources when possible (as opposed to summaries).

  6. If posting an archived version of the article, please include a URL link to the original article in the body of the post.


Some other hardware communities across Lemmy:

Icon by "icon lauk" under CC BY 3.0

founded 1 year ago
MODERATORS
you are viewing a single comment's thread
view the rest of the comments
[–] [email protected] 2 points 3 months ago

I believe they got a $0 license for the M0+ cores in the 2040. Don't know about the new 2350. The addition of Risc-v cores might be a flex to defend against future issues with ARM.

Going from two PIO blocks to three seems timid. Why not hundreds, like one for each gpio pin? And maybe redesign the PIO to allow more than 32 instructions? They are tiny, anyway.

Anyone know if there is any software for the Risc-v cores so far? Compilers, Micropython, etc.